@InProceedings{berg06-plru,
  author =      {Christoph Berg},
  title =       {{PLRU} Cache Domino Effects},
  booktitle =   {6th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, Dresden},
  month =       Jul,
  year =        {2006},
  editor =      {Frank Mueller},
  number =      {06902},
  series =      {Dagstuhl Seminar Proceedings},
  ISSN =        {1862-4405},
  publisher =   {Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI)},
  pdf =         {2006/berg06-plru.pdf},
  bibtex =      {2006/berg06-plru.bib},
  URL =         {http://drops.dagstuhl.de/opus/volltexte/2006/672/},
  keywords =   {Keywords: Embedded systems, predictability, cache memory, PLRU, domino effects, timing anomalies},
  abstract = {Domino effects have been shown to hinder a tight prediction of worst case
  execution times (WCET) on real-time hardware. First investigated by
  Lundqvist and Stenström, domino effects caused by pipeline stalls were shown to
  exist in the PowerPC by Schneider. This paper extends the list of causes of
  domino effects by showing that the pseudo LRU (PLRU) cache replacement
  policy can cause unbounded effects on the WCET. PLRU is used in the PowerPC
  PPC755, which is widely used in embedded systems, and some x86 models.},
}